unify/dev unify/dev
commit 0ca8f458d1d97a3dafe2d20ed9a5bbd8a234da58
Author: n.danilyuk <n.danilyuk@integrasources.com>
Date:   Mon Oct 12 09:36:47 2026 +0700

    fix(logic): 1 GB DMA windows, level-only LA trigger
    
    DMA: the kernel places the scatter gather descriptors of the AXI DMA anywhere in
    RAM; on the 1 GB boards they land above 512 MB (0x3F05xxxx on a 250-12), which
    the 512 MB windows of every DMA in prj/logic answered with a decode error
    (xilinx-vdma "errors 400", SGDecErr) and no LA capture ever completed. The logic
    project maps the whole 1 GB now (PCW_DDR_RAM_HIGHADDR 0x3FFFFFFF for this
    project only, all windows 0x40000000); the 512 MB boards never use the top half.
    
    Trigger: la_trg ANDed the level compare with an edge, so the levels la_pro
    offers ("0 - Low", "1 - High") never fired alone. New parameter LEVEL_ONLY: with
    no edge configured the comparator triggers by itself (an empty configuration
    never does). It is on in old_la_top only, stream_app keeps the old behaviour.
    tbn/la_trg_lvl_tb.sv checks both settings (xsim, 9/9).
    
    Built: logic Z10 WNS +0.055 ns; logic Z20_250 WNS -0.710 ns with
    ALLOW_TIMING_FAIL like the release (the la/acq/sts_pst path was already
    violated). On the boards with the API of redpitaya-public-dev: rp34 (1 GB)
    captures with a 512 MB region and fires level triggers, rp33 the same.
