unify/dev unify/dev
commit 8984ac68ff4b916810506de7e70436f463dbd190
Author: n.danilyuk <n.danilyuk@integrasources.com>
Date:   Thu Oct 8 14:26:38 2026 +0700

    fix(4ch): load the timestamp counters of both scope cores together
    
    The timestamp init registers (0x220 low word, 0x224 high word, the high
    word write loads the counter) were written separately into each scope
    core, so CH3/CH4 timestamps were about 200 ns off CH1/CH2. They join the
    mirrored writes of the first core: sys_bus_interconnect takes two more
    synchronised offsets (SYNC_REG_OFS7/8, default -1 for the other tops) and
    the 4-input top mirrors 0x220 and 0x224. Together with the API writing the
    second core first, both counters start on the same edge (0 ns on .32).
    Z20_4 v0.94 WNS 0.000 ns.
